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71M6521BE
Energy Meter IC
DATA SHEET
JANUARY 2008
Data Flow
The data flow between CE and MPU is shown in Figure 26. In a typical application, the 32-bit compute engine (CE) sequen-
tially processes the samples from the voltage inputs on pins IA, VA, IB, and VB, performing calculations to measure active
power (Wh). These measurements are then accessed by the MPU, processed further and output using the peripheral devices
available to the MPU.
Pulse
IRQ
Samples
CE
Pre-
Data
MPU
Post-
Processed
Metering
Data
Processor
Processor
I/O RAM (Configuration RAM)
Figure 26: MPU/CE Data Flow
CE/MPU Communication
Figure 27 shows the functional relationship between CE and MPU. The CE is controlled by the MPU via shared registers in the
I/O RAM and by registers in the CE DRAM. The CE outputs two interrupt signals to the MPU: CE_BUSY and XFER_BUSY,
which are connected to the MPU interrupt service inputs as external interrupts. CE_BUSY indicates that the CE is actively
processing data. This signal will occur once every multiplexer cycle. XFER_BUSY indicates that the CE is updating data to the
output region of the CE DRAM. This will occur whenever the CE has finished generating a sum by completing an accumulation
interval determined by SUM_CYCLES * PRE_SAMPS samples. Interrupts to the MPU occur on the falling edges of the
XFER_BUSY and CE_BUSY signals.
WPULSE
(DIO6)
DISPLAY (me-
mory-mapped
LCD segments)
SERIAL
(UART0/1)
SAG CONTROL
MPU
ADC
SAMPLES
DATA
EEPROM
(I2C)
CE_BUSY
Mux Ctrl.
CE
XFER_BUSY
INTERRUPTS
DIO
I/O RAM (CONFIGURATION RAM)
Figure 27: MPU/CE Communication
Page: 58 of 97
? 2005-2008 TERIDIAN Semiconductor Corporation
V1.0
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